Robust low leakage controlled keeper by current-comparison domino for wide fan-in gates

Author:

Peiravi Ali,Asyaei Mohammad

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference38 articles.

1. H.L. Yeager et al., Domino Circuit Topology, U.S. Patent 6784695, 2004.

2. K.K. Das et al., Low-Leakage Integrated Circuits and Dynamic Logic Circuits, U.S. Patent 6933744, 2005.

3. On circuit techniques to improve noise immunity of CMOS dynamic logic;Ding;IEEE Transactions on Circuits and Systems,2004

4. Leakage tolerant mechanisms and leakage reduction techniques in deep-submicron CMOS circuits;Roy;Proceedings of the IEEE,2003

5. M.H. Nodine, C.M. Files, A mature methodology for implementing multi-valued logic in silicon, in: Proceedings of 38th IEEE International Symposium on Multiple Valued Logic, ISMVL, 2008, pp. 2–7.

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