High performance quaternary logic designs using GNFETs

Author:

Basha Shaik Javid,Venkatramana P.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Engineering,Energy Engineering and Power Technology

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Energy-efficient design of quaternary logic gates and arithmetic circuits using hybrid CNTFET-RRAM technology;Physica Scripta;2024-07-22

2. Quaternary MIN Logic Gate with Ballistic Graphene Devices;2024 IEEE 24th International Conference on Nanotechnology (NANO);2024-07-08

3. Area-energy optimized ternary multiplier usingefficient design approaches in GNRFET technology;AEU - International Journal of Electronics and Communications;2024-07

4. Performance Analysis of Quaternary Inverter Implemented Using FinFET Models;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28

5. High-speed and power-efficient ternary logic designs using GNR transistors;e-Prime - Advances in Electrical Engineering, Electronics and Energy;2024-03

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