Power dissipation sources and possible control techniques in ultra deep submicron CMOS technologies-Reference-Cited by-同舟云学术

Power dissipation sources and possible control techniques in ultra deep submicron CMOS technologies

Published:2006-09 Issue:9 Volume:37 Page:851-860
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Ekekwe Ndubuisi,Etienne-Cummings Ralph

Publisher

Elsevier BV

Subject

General Engineering

Reference24 articles.

1. Y. Taur, E. Nowark, CMOS devices below 0.1um: how high will performance go?, Electron Devices Meeting, Technical Digest., International Publication, 7-10 December 1997, pp. 215–218.

2. Power-driven challenges in nanometer design;Sylvester;IEEE Des. Test Comput.,2001

3. Chip Design for Submicron VLSI: CMOS Layout and Simulation;Uyemura,2006

4. E. Sicard, CMOS Design, Online Courseware, available at http://www.microwind.org/.

5. Basics of CMOS Design;Sicard,2005

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