A statistical offset calibration technique for 1.5-bit/cycle SAR ADCs-Reference-Cited by-同舟云学术

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A statistical offset calibration technique for 1.5-bit/cycle SAR ADCs

Published:2021-08 Issue: Volume:114 Page:105114
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Li Dengquan,Liu Maliang,Liu Shubin,Liang Yuhua,Ding Ruixue

Funder

National Natural Science Foundation of China

Fundamental Research Funds for the Central Universities

Publisher

Elsevier BV

Subject

General Engineering

Reference20 articles.

1. A non-interleaved 12-b 330-MS/s pipelined-SAR ADC with PVT-stabilized dynamic amplifier achieving sub-1-dB SNDR variation;Huang;IEEE J. Solid State Circ.,2017

2. Design of hybrid flash-SAR ADC using an inverter based comparator in 28nm CMOS;K. B;Microelectron. J.,2020

3. A 32Gb/s PAM-16 TX and ADC-Based RX AFE with 2-tap embedded analog FFE in 28nm FDSOI;Celik;Microelectron. J.,2021

4. Enabling energy efficiency in 5G network;Liu;ZTE Communications,2021

5. Ten reflections on 5G;Wu;ZTE Communications,2020

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A novel capacitor recombination calibration method applied to 18-bit SAR ADC;Microelectronics Journal;2022-11

2. A 3.66 μW 12-bit 1 MS/s SAR ADC with mismatch and offset foreground calibration;Microelectronics Journal;2021-10

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