Thermal and electrical performance investigation of FinFET with encased air-gap gate sidewalls from spacer encapsulation layer material and structure parameter perspectives
Author:
Funder
National Natural Science Foundation of China
Publisher
Elsevier BV
Subject
General Engineering
Reference21 articles.
1. Asymmetric dual-k spacer trigate FinFET for enhanced analog/RF performance;Saini;J. Journal of Computational Electronics.,2016
2. FinFET with encased air-gap spacers for high-performance and low-energy circuits;Sachid;J. IEEE Electron Device Letters,2017
3. Numerical study on the self-heating effects for vacuum/high-k gate dielectric tri-gate FinFETs;Zhang;J. Microelectronics Reliability.,2019
4. Physical insights into electric field modulation in dual-k spacer asymmetric underlap FinFET;Dutta;J. Ieee Transactions on Electron Devices,2016
5. Analytical layout dependent NBTI degradation modeling based on non-uniformly distributed interface traps;Li;J. IEEE Transactions on Device and Materials Reliability,2018
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1. Characterization of ALD Low-K Films;2024 Conference of Science and Technology for Integrated Circuits (CSTIC);2024-03-17
2. Analysis of Underlap Tri-Gate FinFET and Its Capacitance Effects for Analog/Radio Frequency Applications;Journal of Nanoelectronics and Optoelectronics;2023-09-01
3. Design and Compressive Analysis of Junctionless Multigate FinFET Towards Low Power and High Frequency Applications;Silicon;2021-11-08
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