Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software
Reference35 articles.
1. A methodology for algorithm regularization and mapping into time-optimal VLSI arrays;Barada;Parallel Comput.,1993
2. M. Bednara, F. Hannig, J. Teich, Generation of distributed loop control, in: E.F. Deprettere, J. Teich, S. Vassiliadis (Eds.), Embedded Processor Design Challenges, Lecture Notes in Computer Science, vol. 2268, Springer, Berlin, Germany, March 2002, pp. 154–170.
3. A. Benaini, M. Tchuente, Matrix product on linear systolic arrays, in: M. Cosnard, P. Quinton, M. Raynal, Y. Robert (Eds.), Parallel and Distributed Algorithms, North-Holland, Amsterdam, 1989.
4. Constant time fault tolerant algorithms for a linear array with a reconfigurable pipelined bus system;Bourgeois;J. Parallel Distributed Comput.,2005
5. Quadratic control signals in linear systolic arrays;Bowden,2000
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