Recent Development in Efficient Adiabatic Logic Circuits and Power Analysis with CMOS Logic-Reference-Cited by-同舟云学术

Recent Development in Efficient Adiabatic Logic Circuits and Power Analysis with CMOS Logic

Published:2015 Issue: Volume:57 Page:1299-1307
ISSN:1877-0509
Container-title:Procedia Computer Science
language:en
Short-container-title:Procedia Computer Science

Author:

Sanadhya Minakshi,Kumar M.Vinoth

Publisher

Elsevier BV

Subject

General Engineering

Reference8 articles.

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2. “Design of basic gates using ECRL and PFAL”;Ashmeet Kaur Bakshi;International Conference on Advances in computing, communication and informatics, IEEE,2013

3. “Adiabatic Logic, Future Trend and System Level Perspective”;Teichmann;Springer,2012

4. Member, IEEE, Juang-Ying Chueh, Member, IEEE, and Marios C. Papaefthymiou;Visvesh;Senior Member, IEEE “Energy-Efficient GHz-Class Charge-Recovery Logic” Ieee journal of solid-state circuits,2007

5. “Design and analysis of MUX using Adiabatic Techniques ECRL and PFAL”;Arun Kumar;International Conference on Advances in computing, communication and informatics, IEEE,2013

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