Performance Analysis of Adiabatic CMOS Interface for Low Power Applications-Reference-Cited by-同舟云学术

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Performance Analysis of Adiabatic CMOS Interface for Low Power Applications

Published:2022-11-26 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)
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Author:

Rai Lalit¹,Kumar Prashant¹,Gupta Neeraj²,Gupta Rashmi²

Affiliation:

1. J.C. Bose University of Science & Technology YMCA,Dept. of Electronics & Communication Engineering,Faridabad,Faridabad,India,121006

2. Amity University,Amity School of Engineering & Technology,Dept. of Electronics & Communication Engineering,Haryana,Gurugram,India,122413

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10032824/10032825/10032867.pdf?arnumber=10032867

Reference18 articles.

1. Adiabatic Design Implementation of Digital Circuits for Low Power Applications

2. Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application

3. Variations of the power dissipation in adiabatic logic gates;amirante;Proc 11th Int Workshop PATMOS Yverdon-Les-Bains,2014

4. Adiabatic logic based circuit optimization for ultralow power applications;sharma,2020

5. Analysis of NAND/NOR gates using subthreshold adiabatic logic (SAL) for ultra low power applications

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A nanoelectromechanical energy-reversible switch: theoretical study and verification by experiment of its applicability to adiabatic computing;Journal of Computational Electronics;2024-08-23

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