Design, optimization, and performance analysis of GaP/Si heterojunction Fin-TFET with MoS2 nanoribbon channel-Reference-Cited by-同舟云学术

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Design, optimization, and performance analysis of GaP/Si heterojunction Fin-TFET with MoS2 nanoribbon channel

Published:2024-06 Issue: Volume:190 Page:207845
ISSN:2773-0123
Container-title:Micro and Nanostructures
language:en
Short-container-title:Micro and Nanostructures

Author:

Ramesh Potharaju^ORCID,Choudhuri Bijit

Publisher

Elsevier BV

Reference32 articles.

1. Comparing bulk-Si FinFET and gate-all-around FETs for the 5 nm technology node;Vashishtha;Microelectron. J.,2021

2. Mathematical modeling and performance evaluation of 3D Ferroelectric negative capacitance FinFET;Alam;Model. Simulat. Eng.,2022

3. Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction;Ramesh;Microelectron. J.,2023

4. Steep subthreshold slope in nano-wire TFET using a potential well;Bayat;Micro and Nanostructures,2024

5. Performance optimization of high-K pocket hetero-dielectric TFET using improved geometry design;Elshamy;Alex. Eng. J.,2024

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Cutting-edge vertical tunnel FETs: GaSb/InSb heterojunction source-all-around tunnel FET with I60 of 2.73×10⁻⁴ A/μm and Sub-10 mV/dec SS;Micro and Nanostructures;2024-10

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