Author:
Cuesta David,Risco-Martin José L.,Ayala José L.
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference21 articles.
1. D. Cuesta et al., Thermal-aware floorplanning exploration for 3d multi-core architectures, in: GLSVLSI ’10, 2010, pp. 99–102.
2. I.K.Y. Han, C. Moritz, Temperature aware floorplanning, in: Workshop on Temperature-Aware Computer Systems, 2005.
3. C.C.N. Chu, D.F. Wong, A matrix synthesis approach to thermal placement, in: International Symposium on Physical Design, 1997.
4. G. Chen, S. Sapanetkar, Partition-driven standard cell thermal placement, in: International Symposium on Physical Design, p. 2003.
5. A case for thermal-aware floorplanning at the microarchitectural level;Sankaranarayanan;Journal of Instruction Level Parallelism,2005
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