An Accumulator using Electron Tunneling Through Tunnel Junction

Author:

Biswas Dr. Anup Kumar1

Affiliation:

1. Department of Computer Science and Engineering, Kalyani Govt. Engineering College, Kalyani, Nadia, West Bengal, India

Abstract

Instead of an existing logical Technology, by using an emerging technology we will be able to make an electronic circuit with high speed, low cost, high concentration density, light in weight, reduced gate numbers and low power consumption. This technology is based on the linear threshold logic condition and electron-tunneling event. At the time of implementing a circuit, a multi-inputs but one-output based logic-node will be brought in our consideration. In this work, we have designed a 1-bit accumulator and then implemented it. To develop an accumulator, some small components like 2-input AND, 3-input AND, 3-input OR, 8-input OR, 9-input OR gate and above all a JK Flip-flop (for 1-bit) are to be collected and connected them in logical order to obtain the proper circuit. After verifying all their characteristics with the results obtained from the simulator, we have built a 1-bit accumulator. All the small components are provided in due places. They are analyzed, detected their threshold logic equations, shown their threshold logic gates (TLGs), tabulated their truth tables, drawn their input-output waveforms, given their respective circuits with exact parameter values. In the accumulator, there are nine control variables S1 through S9 in view of performing the operations (i) Addition, (ii) clear, (iii) complement, (iv) AND, (v) OR, (vi) XOR, (vii) Right-shift, (viii) Left-shift and (ix) increment with positive triggering clock pulses. Whether our present work’s circuits are faster or slower with respect to the similar circuits of CMOS based- and Single electron transistor (SET) based circuits are compared and observed that our TLG based circuits are faster than the CMOS and SET based circuits. The power consumed for tunneling event for a circuit is measured and sensed that it would remain in the range of 10meV to 250meV which is low. All the circuits we have presented in this work are of ‘generic multiple input threshold logic gate’ which is elaborately discussed.

Publisher

Technoscience Academy

Subject

General Medicine

Reference18 articles.

1. Chin-Heng Liu, Chia-Chun Lin et al, “Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments” IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 38, NO. 12, DECEMBER 2019

2. A.K. Biswas, “Measuring of an unknown voltage by using single electron transistor based voltmeter” , Semiconductor Physics, Quantum Electronics & Optoelectronics(SPQEO), 24 (3), P. 277-287 (2021) August 2021; ISSN 1605-6582 (On-line)

3. Anup Kumar Biswas, “A High-Speed Bidirectional Register with Parallel Loading using single electron Threshold Logic Technology” ,International Journal of Scientific Research in Science, Engineering and Technology (IJSRSET), Vol. 8 (4) : pp394-408; July-August-2021, Print ISSN: 2395-1990 | Online ISSN : 2394-4099 (www.ijsrset.com) doi : https://doi.org/10.32628/IJSRSET

4. Anup Kumar Biswas, “Integrated-Circuit Random Access Memory based on an emerging Technology—electron tunneling through Tunnel Junction” , International Journal of Scientific Research in Science, Engineering and Technology (IJSRSET), Vol. 8 (4) pp.409-424 July-August-2021, Print ISSN: 2395-1990 | Online ISSN : 2394-4099

5. Anup Kumar Biswas, “A High-Speed Bidirectional Register with Parallel Loading using single electron Threshold Logic Technology”, International Journal of Scientific Research in Science, Engineering and Technology Print ISSN: 2395-1990 | Online ISSN : 2394-4099 (www.ijsrset.com),July-August-2021, 8 (4) : pp394-408

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Collision Free Network with Minimal Routing Path for 2<sup>n</sup> Nodes;International Journal of Scientific Research in Science, Engineering and Technology;2022-01-05

2. Parallel Comparator based voltmeter using Single Electron Tunneling Transistor;International Journal of Scientific Research in Science, Engineering and Technology;2021-12-15

3. Threshold Logic Technology based E-cube Routing on a 4-dimensional hypercube;International Journal of Scientific Research in Science, Engineering and Technology;2021-11-01

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3