Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis

Author:

Hara Yuko,Tomiyama Hiroyuki,Honda Shinya,Takada Hiroaki

Publisher

Information Processing Society of Japan

Subject

General Computer Science

Reference21 articles.

1. 1) Gajski, D.D., Dutt, D.N., Wu, C.-H.A. and Lin, Y.-L.S.: High-Level Synthesis: Introduction to Chip and System Design, Kluwer Academic Publishers (1992).

2. C-based SoC design flow and EDA tools: an ASIC and system vendor perspective

3. 3) Gupta, S., Gupta, K.R., Dutt, D.N. and Nicolau, A.: SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits, Kluwer Academic Publishers (2005).

4. 4) De Micheli, G.: Hardware Synthesis from C/C++ Models, Proc. Design, Automation and Test in Europe, IEEE Computer Society, pp.382-383 (1999).

5. 5) Dutt, D.N. and Ramchandran, C.: Benchmarks for the 1992 High Level Synthesis Workshop, Technical Report 92-107, University of California, Irvine (1992).

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