Author:
Gajski Daniel D.,Dutt Nikil D.,Wu Allen C-H,Lin Steve Y-L
Cited by
43 articles.
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1. Shift Register Initialization in Scalar Replacement for Reducing Code Size;IPSJ Transactions on System LSI Design Methodology;2020
2. Formal Verification of Optimizing Transformations during High-level Synthesis;Proceedings of the 12th Innovations on Software Engineering Conference (formerly known as India Software Engineering Conference);2019-02-14
3. Distributed memory architecture for high-level synthesis of embedded controllers from Erlang;Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang;2017-09-08
4. Scalable SMT-Based Equivalence Checking of Nested Loop Pipelining in Behavioral Synthesis;ACM Transactions on Design Automation of Electronic Systems;2017-03-15
5. Speculative execution in distributed controllers for high-level synthesis;Proceedings of the 28th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype - RSP '17;2017