Combination of volatile and non-volatile functions in a single memory cell and its scalability
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Link
http://stacks.iop.org/1347-4065/56/i=4S/a=04CE06/pdf
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1. Floating Body DRAM Characteristics of Silicon-On-ONO (SOONO) Devices for System-on-Chip (SoC) Applications
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1. Grain boundary induced short-term memory effect in fully depleted thin-polysilicon devices;Japanese Journal of Applied Physics;2019-09-16
2. A 1T Dynamic Random Access Memory Cell Based on Gated Thyristor with Surrounding Gate Structure for High Scalability;Journal of Nanoscience and Nanotechnology;2018-09-01
3. Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure;Journal of Nanoscience and Nanotechnology;2018-09-01
4. Fabrication of asymmetric independent dual-gate FinFET using sidewall spacer patterning and CMP processes;Microelectronic Engineering;2018-01
5. Comparison of writing methods of single memory cell with volatile and nonvolatile memory functions;Applied Physics Express;2017-05-25
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