A 1T Dynamic Random Access Memory Cell Based on Gated Thyristor with Surrounding Gate Structure for High Scalability-Reference-Cited by-同舟云学术

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A 1T Dynamic Random Access Memory Cell Based on Gated Thyristor with Surrounding Gate Structure for High Scalability

Published:2018-09-01 Issue:9 Volume:18 Page:5919-5924
ISSN:1533-4880
Container-title:Journal of Nanoscience and Nanotechnology
language:en
Short-container-title:j nanosci nanotechnol

Author:

Kim Hyungjin¹,Kim Sihyun²,Kim Hyun-Min²,Lee Kitae²,Kim Sangwan³,Pak Byung-Gook²

Affiliation:

1. Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA 93106, USA

2. Inter-University Semiconductor Research Center and Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Korea

3. Department of Electrical and Computer Engineering, Ajou University, Suwon 16499, Korea

Publisher

American Scientific Publishers

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,General Chemistry,Bioengineering

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