L-shaped tunnel FET with stacked gates to suppress the corner effect
Author:
Funder
ITRC support program
NRF
MOTIE/KSRC
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Link
https://iopscience.iop.org/article/10.7567/1347-4065/ab0ff1/pdf
Reference30 articles.
1. Simulation of the Esaki-tunneling FET
2. Low-subthreshold-swing tunnel transistors
3. Mn Concentration and Quantum Size Effects on Spin-Polarized Transport Through CdMnTe Based Magnetic Resonant Tunneling Diode
4. A Novel Fabrication Method for the Nanoscale Tunneling Field Effect Transistor
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