FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system-Reference-Cited by-同舟云学术

FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system

Published:2020-02 Issue:2 Volume:13 Page:356-367
ISSN:1755-4543
Container-title:IET Power Electronics
language:en
Short-container-title:IET Power Electronics

Author:

Guerrero Esteban¹^ORCID,Guzmán Enrique¹,Linares Jesús¹,Martínez Alberto²,Guerrero Gerardo²

Affiliation:

1. Institute of Electronics and MechatronicsUniversity Technological of the MixtecaHighway to Acatlima km. 2.5, Huajuapan de LeónOaxacaMéxico

2. Electronics Engineering DepartmentNational Center for Research and Development of TechnologyInt. Internado Palmira s/nCuernavacaMorelosMéxico

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2019.0832

Reference31 articles.

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2. Advanced control method for DC motor drives;Marian S.R.;Int. J. Eng. Appl. Sci.,2016

3. Advanced drive system for DC motor using multilevel DC/DC buck converter circuit;Ismail A.A.A.;IEEE Access,2019

4. 2004 Proc. 2nd IFAC Symp. Syst. Struct. Control Oaxaca Mexico J. Linares‐Flores H. Sira‐Ramírez Sliding mode delta‐modulation GPI control of a DC motor through a buck converter 405 409

5. 2012 Mem. XV CLCA Lima Peru E. Yescas‐Mendoza J. Linares‐Flores M.A. Contreras‐Ordaz Controlador lineal de velocidad angular con rechazo activo de perturbaciones del convertidor reductor/motor de CD

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