Simplified topology for integrated circuit buffer behavioural models-Reference-Cited by-同舟云学术

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Simplified topology for integrated circuit buffer behavioural models

Published:2017-03 Issue:2 Volume:11 Page:183-187
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Systems

Author:

Diouf Chérif El Valid¹²,Telescu Mihai¹,Stievano Igor S.³,Tanguy Noël¹,Canavero Flavio G.³

Affiliation:

1. CNRS, UMR 6285, Lab‐STICCUniversité de BrestCS93837‐29238Brest Cedex 3France

2. CNRS, UMR 6285 Lab‐STICCEcole Nationale d'Ingénieurs de Brest (ENIB)CS73962‐29238Technopole Brest IroiseBrestFrance

3. Department of Electronics and TelecommunicationsPolitecnico di Torino10129TorinoItaly

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2015.0368

Reference20 articles.

1. Demystifying Surrogate Modeling for Circuits and Systems

2. Progress Review of Electromagnetic Compatibility Analysis Technologies for Packages, Printed Circuit Boards, and Novel Interconnects

3. Designing and Modeling for Power Integrity

4. Improving Behavioral IO Buffer Modeling Based on IBIS

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Modeling of IC Buffers from Channel Responses Via Machine Learning Kernel Regression;2024 IEEE 28th Workshop on Signal and Power Integrity (SPI);2024-05-12

2. A Bit-Time-Dependent Model of I/O Drivers for Overclocking Analysis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-07

3. Constructive Signal Approximations for Fast Transient Simulation of Coupled Channels;IEEE Transactions on Components, Packaging and Manufacturing Technology;2019-10

4. Mixed-Signal Overclocked I/O Buffers Model Abstraction for Signal Integrity Assessment;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-03

5. Power Supply- and Temperature-Aware I/O Buffer Model for Signal-Power Integrity Simulation;Mathematical Problems in Engineering;2018-08-08

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