Mixed-Signal Overclocked I/O Buffers Model Abstraction for Signal Integrity Assessment-Reference-Cited by-同舟云学术

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Mixed-Signal Overclocked I/O Buffers Model Abstraction for Signal Integrity Assessment

Published:2019-03 Issue:3 Volume:27 Page:691-699
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Dghais Wael^ORCID,Souilem Malek,Alam Muhammad

Funder

Ministry of Higher Education and Scientific Research of Tunisia within the framework of the Tunisian–Portuguese Cooperation Project in the field of scientific research and technology

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/8649697/08588389.pdf?arnumber=8588389

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Modeling of IC Buffers from Channel Responses Via Machine Learning Kernel Regression;2024 IEEE 28th Workshop on Signal and Power Integrity (SPI);2024-05-12

2. A Bit-Time-Dependent Model of I/O Drivers for Overclocking Analysis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-07

3. I/O Buffer Modelling for Power Supplies Noise Induced Jitter under Simultaneous Switching Outputs (SSO);2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC);2019-10

4. Constructive Signal Approximations for Fast Transient Simulation of Coupled Channels;IEEE Transactions on Components, Packaging and Manufacturing Technology;2019-10

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