Low‐power 6‐GHz wave‐pipelined 8 b × 8 b multiplier-Reference-Cited by-同舟云学术

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Low‐power 6‐GHz wave‐pipelined 8 b × 8 b multiplier

Published:2013-05 Issue:3 Volume:7 Page:124-140
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Systems

Author:

Saha Aloke¹,Pal Dipankar²,Chandra Mahesh³

Affiliation:

1. Department of Electronics and Communication EngineeringDr. B. C. Roy Engineering CollegeDurgapurIndia

2. North Eastern Regional Institute of Science and TechnologyItanagarIndia

3. Department of Electronics and Communication EngineeringBIT MesraRanchiIndia

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2012.0221

Reference25 articles.

1. Power-efficient pipelined reconfigurable fixed-width Baugh-Wooley multipliers

2. Aguirre‐Hernandez M. Linares‐Aranda M.: ‘Energy‐efficient high‐speed CMOS pipelined multiplier’.Fifth Int. Conf. on Electrical Engineering Computing Science and Automatic Control (CCE 2008) December2008 pp.460–464

3. Aguirre M. Salim M. Linares M.: ‘Design of a 3.3‐V 1.2‐GHz pipelined multiplier to implement energy‐efficient multimedia applications’.48th Midwest Symp. on Circuits and Systems August2005 pp.1402–1405

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