ECAP: energy‐efficient caching for prefetch blocks in tiled chip multiprocessors
Author:
Affiliation:
1. MARS Research LaboratoryDepartment of Computer Science and EngineeringIndian Institute of TechnologyGuwahatiIndia
2. Department of Electrical, Electronic and Computer EngineeringUniversity of CataniaCataniaItaly
Funder
Science and Engineering Research Board
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2019.0035
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5. A survey of research and practices of network‐on‐chip;Bjerregaard T.;ACM Comput. Surv.,2006
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