Digital storage, addition and subtraction of time-mode variables

Author:

Ali-Bakhshian M.,Roberts G.W.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Analog Latch for Time-Mode PWM Signal Processing;2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST);2023-06-28

2. A Time-Mode PWM 1st Order Low-Pass Filter;Journal of Low Power Electronics and Applications;2023-05-06

3. Error‐compensated time integrator in 28‐nm CMOS technology;Electronics Letters;2020-08

4. Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time-Mode Signal Processing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-09

5. Design techniques of all‐digital arithmetic units for time‐mode signal processing;IET Circuits, Devices & Systems;2018-05-08

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