Analog Latch for Time-Mode PWM Signal Processing
Author:
Affiliation:
1. University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504
2. Thess IC SMPC,Thessaloniki,Greece,55535
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10176331/10176367/10176888.pdf?arnumber=10176888
Reference8 articles.
1. A Time-Domain z?1 Circuit with Digital Calibration;panetas-felouris;Journal of Low Power Electronics and Applications 2022 Vol 12 Page 3,2022
2. Charge-based time registers for z-1 implementation
3. Digital storage, addition and subtraction of time-mode variables
4. An integrated time register and arithmetic circuit with combined operation for time-domain signal processing
5. A 3rd-Order FIR Filter Implementation Based on Time-Mode Signal Processing;panetas-felouris;Electronics 2022 Vol 11 Page 902,2022
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