Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time-Mode Signal Processing-Reference-Cited by-同舟云学术

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Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time-Mode Signal Processing

Published:2018-09 Issue:9 Volume:26 Page:1788-1801
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Abdelfattah Moataz^ORCID,Roberts Gordon^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/8444866/08352760.pdf?arnumber=8352760

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Time-Domain Reconfigurable Second-Order Noise Shaping ADC With Single Fan-Out Gated Delay Cells;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-06

2. Structure‐induced low‐sensitivity design of sampled data and digital ladder filters using delta discrete‐time operator;International Journal of Circuit Theory and Applications;2022-02-18

3. A scalable high-linearity two-step DTC-assisted voltage–to-time converter with rail-to-rail input-range for time-based circuits;AEU - International Journal of Electronics and Communications;2021-01

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