High-resolution time-to-digital converter utilising fractional difference conversion scheme
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el.2010.2698?crawler=true&mimetype=application/pdf
Reference5 articles.
1. A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
2. A high-precision time-to-digital converter using a two-level conversion scheme
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