Low-Power High-Performance Tunnel FET With Analysis for IoT Applications

Abstract

The emerging tunnel FET is analysed in terms of ON-state current, OFF-state current, subthreshold slope, switching capacitance to explore its applications for smaller size low-power high-speed digital and memory applications that are an integral part of portable intelligent devices for IoT applications. A large portion of IoT systems are associated with these embedded SRAM/DRAM memories that contribute to a major portion of power dissipation in systems-on-chip (SoCs) or digital design. Several SRAM cell-based memory designs with TFET structures are compared to focus their applications. The ambilpolar nature of TFET structures are investigated for highly random, unclonable secured hardware systems. New circuit designs with TFET were explored for turn-on voltage reduction, ON-state resistance reduction, and reverse leakage reduction techniques that plays an important role in designing efficient energy-harvesting systems.