Wafer level hermetic packaging based on Cu–Sn isothermal solidification technology
Author:
Publisher
IOP Publishing
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference13 articles.
1. Selective bonding and encapsulation for wafer-level vacuum packaging of MEMS and related micro systems
2. Critical interlayer thickness for transient liquid phase bonding in the Cu–Sn system
3. Strength of joints produced by transient liquid phase bonding in the Cu–Sn system
4. Solid state diffusion in Cu–Sn and Ni–Sn diffusion couples with flip-chip scale dimensions
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1. Study on the interfacial IMCs growth of nt-Cu/In solder joints;2023 24th International Conference on Electronic Packaging Technology (ICEPT);2023-08-08
2. Development and Characterization of Low Temperature Wafer-Level Vacuum Packaging Using Cu-Sn Bonding and Nanomultilayer Getter;Micromachines;2023-02-14
3. Investigation of Low-Pressure Sn-Passivated Cu-to-Cu Direct Bonding in 3D-Integration;Materials;2022-11-04
4. Development of 3-D Wafer Level Packaging for SAW Filters Using Thin Glass Capping Technology;IEEE Transactions on Components, Packaging and Manufacturing Technology;2022-02
5. A review of intermetallic compound growth and void formation in electrodeposited Cu–Sn Layers for microsystems packaging;Journal of Materials Science: Materials in Electronics;2021-02-24
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