Performance Analysis of Multipliers Using Modified Gate Diffused Input Technology
Author:
Affiliation:
1. Department of ECE, Sri Siddhartha Institute of Technology, Tumakuru 572105, India
2. Department of Electronic and Communication, R V College of Engineering, Bengaluru 560059, India
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering,Computer Science Applications,Theoretical Computer Science
Link
https://www.tandfonline.com/doi/pdf/10.1080/03772063.2020.1782778
Reference17 articles.
1. Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits
2. G. S. Smitha, and H. V. Ravish Aradhya. “m-GDI based parallel adder for low power application,” Int. J. Microsyst Technol., Vol. 25, pp. 1653-1658, June 2017.
3. A novel design of low power and high read stability Ternary SRAM (T-SRAM), memory based on the modified Gate Diffusion Input (m-GDI) method in nanotechnology
4. Low power multipliers based on new hybrid full adders
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