A Unified Libraries for GDI Logic to Achieve Low-Power and High-Speed Circuit Design
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Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-5482-5_36
Reference14 articles.
1. Geetha S, Amritvalli P (1019) Design of high speed error tolerant adder using gate diffusion input technique. J Electron Test 10836–019–05802–2, May 1019
2. Kishore P, Koteswaramma KC, Chalapathi Rao Y () Design of High Performance Adder Using Modified Gdi Based Full Adder. J Mech Cont Math Sci 15(8)
3. Sarkar S, Chatterjee H, Saha P, Biswas M (2020) 8-Bit ALU Design using m-GDI Technique. In: Proceedings of the fourth international conference on trends in electronics and informatics (ICOEI 2020) IEEE Xplore Part Number: CFP20J32-ART, pp 17–22
4. Morgenshtein A, Fish A, Wagner IA (2002) Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits. IEEE Trans Very Large Scale Integr (VLSI) Syst 10(5):566–581
5. Uma R, Dhavachelvan P (2012) Modified gate diffusion input technique: a new technique for enhancing performance in full adder circuits, 2nd International conference on communication, computing and security [ICCCS-2012]. Proc Technol 6:74–81
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