Laterally asymmetric channel-based tunnel fieldeffect transistors: design and investigation
Author:
Affiliation:
1. Department of Electronics and Communication Engineering, Jamia Millia Islamia (Central University), New Delhi, India
2. Electrical Engineering Department, King Saud University, Riyadh, Saudi Arabia
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
https://www.tandfonline.com/doi/pdf/10.1080/00207217.2020.1793400
Reference38 articles.
1. In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor
2. Performance Enhancement of Novel InAs/Si Hetero Double-Gate Tunnel FET Using Gaussian Doping
3. Tunnel field effect transistor with increased ON current, low-k spacer and high-k dielectric
4. A High-Performance Inverted-C Tunnel Junction FET With Source–Channel Overlap Pockets
5. Dual-Metal-Gate InAs Tunnel FET With Enhanced Turn-On Steepness and High On-Current
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