Author:
Sudhakar J.,Alekhya Y.,Syamala K. S.
Reference16 articles.
1. Smith SC, Di J (2009) Designing asynchronous circuits using NULL convention logic. Synth Lect Digit Circuits Syst 4(1):1–96
2. Fant KM (2005) Logically determined design: clockless system design with null convention logic. Wiley, Hoboken
3. Bandapati SK, Smith SC (2007) Design and characterization of NULL convention arithmetic logic units. Microelectron Eng 84(2):280
4. Parsan FA, Smith SC (2012) CMOS implementation of static threshold gates with hysteresis. In: Proceedings of the IEEE/IFIP 20th international conference on VLSI and system-on-chip(VLSI-SoC ’12), pp 41–45
5. Song Z, Smith SC (2013) Implementation of a fast fourier transform processor in NULL convention logic. In: Proceedings of the international conference on computer design, pp 10–16
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