Author:
Suga Tadatomo,He Ran,Vakanas George,La Manna Antonio
Reference86 articles.
1. A. Fan, A. Rahman, R. Reif, Copper wafer bonding. Electrochem. Solid-State Lett. 2, 534–536 (1999). https://doi.org/10.1149/1.1390894
2. A. Shigetou, N. Hosoda, T. Itoh, T. Suga, Room-temperature direct bonding of CMP-Cu film for bumpless interconnection, in 2001 51st Electron Electronic Components and Technology Conference (Orlando, FL, 2001), pp 755–760
3. P.R. Morrow, C.-M. Park, S. Ramanathan, M.J. Kobrinsky, M. Harmes, Three-dimensional wafer stacking via Cu–Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology. IEEE Electron Device Lett. 27, 335–337 (2006). https://doi.org/10.1109/LED.2006.873424
4. A. Shigetou, T. Itoh, M. Matsuo, N. Hayasaka, K. Okumura, T. Suga, Bumpless interconnect through ultrafine Cu electrodes by means of surface-activated bonding (SAB) method. IEEE Trans. Adv. Packag. 29, 218–226 (2006). https://doi.org/10.1109/TADVP.2006.873138
5. B. Swinnen, W. Ruythooren, P. De Moor, L. Bogaerts, L. Carbonell, K. De Munck, B. Eyckens, S. Stoukatch, D.S. Tezcan, Z. Tokei, J. Vaes, 3D integration by Cu–Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias, in 2006 International Electron Devices Meeting (IEEE, 2006), pp. 1–4
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