Analysis of RSNM and WSNM of 6T SRAM Cell Using Ultra Thin Body FD-SOI MOSFET-Reference-Cited by-同舟云学术

Analysis of RSNM and WSNM of 6T SRAM Cell Using Ultra Thin Body FD-SOI MOSFET

Published:2018-11-20 Issue: Volume: Page:619-627
ISSN:1876-1100
Container-title:Lecture Notes in Electrical Engineering
language:
Short-container-title:

Author:

Mishra Vimal Kumar,Yadava Narendra,Nigam Kaushal,Bansal Bajrang,Chauhan R. K.

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-13-2553-3_61

Reference12 articles.

1. Andrei, P., Sachdev, M.: CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies. Springer (2008)

2. International Technology Roadmap for Semiconductors, Edition of ITRS. (2016)

3. Ebrahimi, B., Zeinolabedinzadeh, S., Kusha, A.A.: Low Standby power and robust FinFET based SRAM design. In: Symposium on VLSI, ISVLSI’08. IEEE Computer Society Annual, pp. 185–190. IEEE (2008)

4. Mishra, V.K., Chauhan, R.K.: Performance analysis of fully depleted ultra thin body (FD UTB SOI MOSFET) based CMOS inverter circuit for low power digital applications. In: Advances in Intelligent System and Computing, pp. 375–382 (2016)

5. Cheng, K.G., Khakifirooz, A.: Fully depleted SOI (FDSOI) technology. Sci. China Inf. Sci. 59, 1–15 (2016)

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and Simulation of Bi-Layer Optimized High K- Dielectric Medium for N-Mosfet with Wild Horse Optimization to Improve Electrical Characteristics;ECS Journal of Solid State Science and Technology;2024-07-01

2. Certain investigations in achieving low power dissipation for SRAM cell;Microprocessors and Microsystems;2020-09

3. Analysis of SRAM cell design;Proceedings of the Third International Conference on Advanced Informatics for Computing Research - ICAICR '19;2019