1. Andrei, P., Sachdev, M.: CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies. Springer (2008)
2. International Technology Roadmap for Semiconductors, Edition of ITRS. (2016)
3. Ebrahimi, B., Zeinolabedinzadeh, S., Kusha, A.A.: Low Standby power and robust FinFET based SRAM design. In: Symposium on VLSI, ISVLSI’08. IEEE Computer Society Annual, pp. 185–190. IEEE (2008)
4. Mishra, V.K., Chauhan, R.K.: Performance analysis of fully depleted ultra thin body (FD UTB SOI MOSFET) based CMOS inverter circuit for low power digital applications. In: Advances in Intelligent System and Computing, pp. 375–382 (2016)
5. Cheng, K.G., Khakifirooz, A.: Fully depleted SOI (FDSOI) technology. Sci. China Inf. Sci. 59, 1–15 (2016)