Certain investigations in achieving low power dissipation for SRAM cell
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference18 articles.
1. Flexible circuits and architectures for ultralow-power;Calhoun;Proc. IEEE,2010
2. An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches;Chang;IEEE J. Solid-State Circuits,2008
3. “A 256 kb 65nm 8T subthreshold SRAM is employing sense-amplifier redundancy;Verma;IEEE J. Solid-State Device Res. conf.,2012
4. A 0.2 V, 480 kb sub-threshold SRAM with 1k cells per bit line for ultra-low-voltage computing;Kim;IEEE J. Solid-State Circuits,2008
5. A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation;Calhoun;IEEE J. Solid-State Circuits,2007
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