High-efficient two-step switching scheme for SAR ADC with dual-capacitive arrays and four-input comparator-Reference-Cited by-同舟云学术

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High-efficient two-step switching scheme for SAR ADC with dual-capacitive arrays and four-input comparator

Published:2019-09-12 Issue:2 Volume:101 Page:363-373
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Chen Tengteng,Cai Jueping^ORCID,Li Xinyu,Xin Xin,Shi Qi

Funder

the innovation wisdom base for wide bandgap semiconductor and micro-nano electronics of China

Strategic international scientific and technological innovation cooperation key projects

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/content/pdf/10.1007/s10470-019-01536-5.pdf

Reference10 articles.

1. Liu, C. C., Chang, S. J., Huang, G. Y., & Lin, Y. Z. (2010). A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure. IEEE Journal of Solid-State Circuits, 45(4), 731–740.

2. Zhu, Y., Chan, C. H., Chio, U. F., & Sin, S. W. (2010). A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS. IEEE Journal of Solid-State Circuits, 46(6), 1111–1121.

3. Srinivasan, S. R., & Balsara, P. T. (2014). Energy-efficient sub-DAC merging scheme for variable resolution SAR ADC. Electronics Letters, 50(20), 1421–1423.

4. Yuan, C., & Lam, Y. (2012). Low-energy and area-efficient tri-level switching scheme for SAR ADC. Electronics Letters, 48(9), 482–483.

5. Tong, X., & Ghovanloo, M. (2015). Energy-efficient switching scheme in SAR ADC for biomedical electronics. Electronics Letters, 51(9), 676–678.

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Bi/Tri-level Self-Adaptive Two-Step DAC Switching Scheme for High-Power Efficiency SAR-Based ADCs;Circuits, Systems, and Signal Processing;2023-03-29

2. High Energy Efficiency and Linearity Switching Scheme Without Reset Energy for SAR ADC;Circuits, Systems, and Signal Processing;2022-05-17

3. High energy-efficient switching scheme for SAR ADC with low common-mode level variation;Analog Integrated Circuits and Signal Processing;2021-02-22

4. MSB-split VCM-based charge recovery symmetrical switching with set-and-down asymmetrical switching method for dual-capacitive arrays SAR ADC;Analog Integrated Circuits and Signal Processing;2021-01-07

5. A high energy-efficiency and low-area switching scheme for SAR ADCs;Analog Integrated Circuits and Signal Processing;2020-11-18

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