Energy‐efficient sub‐DAC merging scheme for variable resolution SAR ADC
Author:
Affiliation:
1. Erik Jonsson School of Engineering and Computer ScienceThe University of Texas at Dallas800 W Campbell RoadRichardsonTX75080‐3021USA
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2014.1760
Reference6 articles.
1. A 10 bit charge‐redistribution ADC consuming 1.9 μW at 1 MS/s;Van Elzakker M.;IEEE J. Solid‐State Circuits,2010
2. Merged capacitor switching based SAR ADC with highest switching energy-efficiency
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