Author:
Bisdounis Labros,Gouvetas Dimitrios,Koufopavlou Odysseas
Reference31 articles.
1. A. Chandrakasan, R. Brodersen, Low Power Digital Design, Kluwer Academic Publishers, 1995.
2. Meta-Software, HSPICE User’s Manual — Version 96.1,1996.
3. K. Yano, Y. Sasaki, K. Rikino, K. Seki, “Top-Down Pass-Transistor Logic Design”. IEEE Journal of Solid-State Circuits, vol.31, pp. 792–803. 1996
4. MIPS Technologies, “R4200 Microprocessor Product Information”, MIPS Technologies Inc., 1994
5. K. Yano, T. Yamanaka, T. Nishida, M Saito, K. Shimohigashi, A. Shimizu, “A 3.8-ns CMOS 16 × 16-b Multiplier Using Complementary Pass-Transistor Logic”, IEEE Journal of Solid-State Circuits, vol.25, pp. 388–395, 1990.
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