Modeling of Power Consumption of Adiabatic Gates versus Fan in and Comparison with Conventional Gates-Reference-Cited by-同舟云学术

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Modeling of Power Consumption of Adiabatic Gates versus Fan in and Comparison with Conventional Gates

Published:2000 Issue: Volume: Page:265-275
ISSN:0302-9743
Container-title:Integrated Circuit Design
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Author:

Alioto M.,Palumbo G.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-45373-3_28

Reference12 articles.

1. A. Matsuzawa, “Low-Voltage And Low-Power Circuit Design For Mixed Analog/Digital Systems In Portable Equipment,” IEEE Jour. of Solid-State Circuits, no. 4, pp. 470–486, April 1994.

2. W. Athas, L. Svensson, J. Koller, N. Tzartzanis, E. Ying-Chin Chou, “Low-Power Digital Systems Based on Adiabatic-Switching Principles,” IEEE Trans. on VLSI, Vol. 2, N. 4, pp. 398–407, December 1994.

3. L. Svensson, “Adiabatic Switching,” in Low Power Digital CMOS Design, A. Chandrakasan, R. Brodersen, Kluwer Academic Publisher, 1995.

4. W. Athas, “Energy-Recovery CMOS,” in Low Power Digital Design Methodologies, J. Rabey, M. Pedram, Eds., Kluwer Academic Publisher, 1995.

5. V. Oklobdzija, D. Maksimovic, F. Lin, “Pass-Transistor Adiabatic Logic Using Single Power-Clock Supply,” IEEE Trans on CAS part II, Vol. 44, N. 10, pp. 842–846, Oct. 1997.

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