Investigation of Nanosheet-FET Based Logic Gates at Sub-7 nm Technology Node for Digital IC Applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-022-01934-x.pdf
Reference28 articles.
1. Chiang T (2020) Nanosheet FET: A new subthreshold current model caused by interface-trapped-charge and its application for evaluation of subthreshold logic gate. Microelectron J 104:104893
2. Kumar S, Kumari V, Singh S, Saxena M, gupta M (2018)Sub-threshold drain current model of Double Gate RingFET (DG-RingFET) architecture: an analog and linearity performance investigation for RFIC design. IETE Tech Rev 35:169179
3. Bhoj AN, Jha NK (2013) Design of logic gates and Flip-Flops in High-Performance FinFET technology. IEEE Trans Very Large Scale Integr VLSI Syst 21:19751988
4. Mahboob Sardroudi F, Habibi M, Moaiyeri MH (2021) A low-power dynamic ternary full adder using carbon nanotube field-effect transistors. AEU - Int J Electron Commun 131:153600
5. Monika Sharma R, Narang MS, Gupta M (2021) Modeling and simulation-based investigation of 2-D symmetric double gate Dopingless-TFET and its circuit performance for low-power applications. IETE Tech Rev. https://doi.org/10.1080/02564602.2021.1912661
Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Pushing the Boundaries: Design and Simulation Approach of Negative Capacitance Nanosheet FETs with Ferroelectric and Dielectric Spacers at the Sub-3 nm Technology Node for Analog/RF/Mixed Signal Applications;ACS Applied Electronic Materials;2024-05-09
2. A Proposal for Optimization of Spacer Engineering at Sub-5-nm Technology Node for JL-TreeFET: A Device to Circuit Level Implementation;IEEE Transactions on Electron Devices;2024-01
3. A Comparative Analysis of FinFET and Nanosheet FET based Circuits with Geometrical Parameter Variations at sub-5 nm technology node;2023 IEEE 20th India Council International Conference (INDICON);2023-12-14
4. Design Considerations into Circuit Applications for Structurally Optimised FinFET;ECS Journal of Solid State Science and Technology;2023-12-01
5. Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes;Microelectronics Journal;2023-12
1.学者识别学者识别
2.学术分析学术分析
3.人才评估人才评估
"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370
www.globalauthorid.com
TOP
Copyright © 2019-2024 北京同舟云网络信息技术有限公司 京公网安备11010802033243号 京ICP备18003416号-3