Induction of Buried Oxide Layer in Substrate FD-SOI MOSFET for Improving the Digital and Analog Performance
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
http://link.springer.com/content/pdf/10.1007/s12633-019-00317-z.pdf
Reference17 articles.
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2. Cheng K, Ali K (2016) Fully depleted SOI (FDSOI) technology. SCIENCE CHINA Inf Sci 59:061402. https://doi.org/10.1007/s11432-016-5561-5
3. Shin C et al (2010) Performance and area scaling benefits of FD-SOI technology for 6-T SRAM cells at the 22-nm node. IEEE Transactions on Electron Devices 57:1301–1309. https://doi.org/10.1109/TED.2010.2046070
4. Chouksey S, Fossum JG, Agrawal S (2010) Insights on design and scalability of thin-BOX FD/SOI CMOS. IEEE Trans Electron Devices 57:2073–2079. https://doi.org/10.1109/TED.2010.2052420
5. Xu N et al (2012) Carrier-mobility enhancement via strain engineering in future thin-body MOSFETs. IEEE Electron Device Letters 33:318–320. https://doi.org/10.1109/LED.2011.2179113
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