Reliability and Power Analysis of FinFET Based SRAM
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-021-01345-4.pdf
Reference24 articles.
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3. Nowak EJ, Aller I, Ludwig T, Keunwoo Kim, Joshi RV, Ching-te Chaung, Berstein K, Puri R (2004) Turning silicon on its edge double gate CMOS/FinFET technology, IEEE Circ Devices Mag 20(1):20–31
4. Sachid AB, Chen M, Hu C (2017) Bulk FinFET with low-k spacers for continued scaling. IEEE Trans Electron Devices 64(4):1861–1864
5. Sreenivasulu VB, Narendar V (2021) Design and Deep Insights into Sub-10 nm Spacer Engineered Junctionless FinFET for Nanoscale Applications. ECS J. Solid State Sci. Technol 10:013008. https://doi.org/10.1149/2162-8777/abddd4
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