Analysis of a Novel Nanoscale Vacuum Channel TF-FinFET
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-021-01103-6.pdf
Reference34 articles.
1. Boukortt N, Patanè S, Crupi G (2019) 3D investigation of 8-nm tapered n-FinFET model. Silicon 12:19–20. https://doi.org/10.1007/s12633-019-00253-y
2. Kashyap MP, Chaujar R (2020) "temperature investigation of a novel 3nm TF-bulk FinFET for improved performance," 2020 IEEE 20th international conference on nanotechnology (IEEE-NANO). Montreal, QC, pp 382–387. https://doi.org/10.1109/NANO47656.2020.9183594
3. Kumar A, Tripathi MM, Chaujar R (2017) Investigation of parasitic capacitances of In2O5Sn gate electrode recessed channel MOSFET for ULSI switching applications. Microsystem Technol 23(12):5867–5874. https://doi.org/10.1007/s00542-017-3348-2
4. Kumar A, Gupta N, Chaujar R (2016) Analysis of novel transparent gate recessed channel (TGRC) MOSFET for improved analog behaviour. Microsyst Technol 22(11):2665–2671. https://doi.org/10.1007/s00542-015-2554-z
5. Yu E, Heo K, Cho S (2018) Characterization and optimization of inverted-T FinFET under Nanoscale dimensions. IEEE Trans Electron Devices 65(8):3521–3527. https://doi.org/10.1109/TED.2018.2846478
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