Subthreshold Current Modeling of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET for Low Power Applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-021-01399-4.pdf
Reference37 articles.
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3. Rewari S, Nath V, Haldar S, Deswal SS, Gupta RS (2018)Gate-induceddrain leakage reduction in the cylindrical dual-metalhetero-dielectric gate all around MOSFET. IEEE Trans Electron Devices 65(1):3–10. https://doi.org/10.1109/TED.2017.2771814
4. Sharma A, Jain A, Pratap Y, Gupta RS (2016)Effect of High-Kand vacuum dielectrics as gate stack on junctionless cylindrical surrounding gate MOSFET. Solid-StateElectron 123:26–32. https://doi.org/10.1016/j.sse.2016.05.016
5. Verma JHK, Haldar S, Gupta RS, Gupta M (2015)Modeling and simulation of subthreshold behaviour of cylindrical surrounding double gate MOSFET for enhanced electrostatic integrity. Superlattices Microstruct 88:354–364. https://doi.org/10.1016/j.spmi.2015.09.024
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