Parallel Partitioning Techniques for Logic Minimization Using Redundancy Identification
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Springer Berlin Heidelberg
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http://link.springer.com/content/pdf/10.1007/978-3-540-24596-4_19
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3. Kunz, W., Pradhan, D.K.: Recursive Learning: An Attractive Alternative to the Decision Tree for Test Generation in Digital Circuits. In: Proceedings of the IEEE International Test Conference, September 1992, pp. 816–825 (1992)
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1. Parallel Partitioning Techniques for Logic Minimization Using Redundancy Identification;High Performance Computing - HiPC 2003;2003
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