HVoC: a Hybrid Model Checking - Interactive Theorem Proving Approach for Functional Verification of Digital Circuits
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
https://link.springer.com/content/pdf/10.1007/s10836-021-05956-y.pdf
Reference20 articles.
1. Hasan O, Tahar S (2015) Formal verification methods. In Encyclopedia of Information Science and Technology, Third Edition. IGI Global, pp. 7162–7170
2. Shiraz S, Hasan O (2018) A HOL library for hardware verification using theorem proving. IEEE Trans Comput Aided Des Integr Circuits Syst 37(2):512–516
3. Yu C, Brown W, Liu D, Rossi A, Ciesielski M (2016) Formal verification of arithmetic circuits by function extraction. IEEE Trans Comput Aided Des Integr Circuits Syst 35(12):2131–2142
4. Chandrasekharan A, Soeken M, Große D, Drechsler R (2016) Precise error determination of approximated components in sequential circuits with model checking. In Design Automation Conference, ACM, p. 129
5. Hamad GB, Hasan SR, Mohamed OA, Savaria Y (2015) Characterizing, modeling, and analyzing soft error propagation in asynchronous and synchronous digital circuits. Microelectron Reliab 55(1):238–250
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