Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board-Reference-Cited by-同舟云学术

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

Published:2002-05-02 Issue:2 Volume:124 Page:69-76
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Lau John H.¹,Pan Stephen H.¹,Chang Chris¹

Affiliation:

1. Agilent Technologies, Inc., 5301 Stevens Creek Blvd., Santa Clara, CA 95052

Abstract

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt percent Sn-3.5wt percent Ag and 100wt percent In. The 62wt percent Sn-36wt percent Pb-2wt percent Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP Solder joint reliability are investigated.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/124/2/69/5882818/69_1.pdf

Reference46 articles.

1. Lau, J. H., 2000, Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, McGraw-Hill, New York, NY.

2. Lau, J. H., and Lee, W-S. R., 1999, Chip Scale Package: Design, Materials, Process, Reliability, and Applications, McGraw-Hill, New York, NY.

3. Lau, J. H., and Pao, Y-H., 1997, Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies, McGraw-Hill, New York, NY.

4. Lau, J. H., 1996, Flip Chip Technologies, McGraw-Hill, New York, NY.

5. Lau, J. H., 1995, Ball Grid Technology, McGraw-Hill, New York, NY.

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