Forced Convection Board Level Thermal Design Methodology for Electronic Systems-Reference-Cited by-同舟云学术

Forced Convection Board Level Thermal Design Methodology for Electronic Systems

Published:2000-07-21 Issue:2 Volume:123 Page:120-126
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Cole Reena¹,Dalton Tara¹,Punch Jeff¹,Davies Mark R.¹,Grimes Ronan¹

Affiliation:

1. PEI Technologies: Stokes Research Institute, Department of Mechanical and Aeronautical Engineering, University of Limerick, Limerick, Ireland

Abstract

The case is made for the continued use of single valued thermal resistances for the prediction of component junction temperature, and, hence, reliability. These values are adjusted using empirically determined influence factors to account for thermal and aerodynamic interactions at board level. The paper presents measured values of influence factors for arrays of Plastic Quad Flat Packs (PQFPs) over a range of Reynolds numbers and with a series of board level obstacles modeling upstream passive components. The results are formulated into a novel set of design rules.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/123/2/120/5552911/120_1.pdf

Reference23 articles.

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