Finite Element Method for MRAM Switching Simulations
Author:
Affiliation:
1. Christian Doppler Laboratory for Nonvolatile Magnetoresisitive Memory and Logic at the Institute for Microelectronics, Tu Wien, Gußhausstraße 27–29/e360, 1040 Vienna, Austria
2. Silvaco Europe Ltd., Cambridge, United Kingdom
Abstract
Publisher
World Scientific and Engineering Academy and Society (WSEAS)
Subject
Artificial Intelligence,General Mathematics,Control and Systems Engineering
Reference27 articles.
1. T. Hanyu, T. Endoh, D. Suzuki, H. Koike, Y. Ma et al., “Standby-power-free integrated circuits using MTJ-based VLSI computing,” Proc. IEEE, vol. 104, no. 10, pp. 1844–1863, 2016.
2. W. J. Gallagher, E. Chien, T. Chiang, J. Huang, M. Shih et al., “22nm STT-MRAM for reflow and automotive uses with high yield, reliability, and magnetic immunity and with performance and shielding options,” in Proc. IEDM Conf., 2019, pp. 2.7.1–2.7.4.
3. S. H. Han, J. M. Lee, H. M. Shin, J. H. Lee, K. S. Suh et al., “28nm 0.08 mm2/Mb embedded MRAM for frame buffer memory,” in Proc. IEDM Conf., 2020, pp. 11.2.1–11.2.4.
4. Y.-C. Shih, C.-F. Lee, Y.-A. Chang, P.-H. Lee, H.-J. Lin et al., “A reflow-capable, embedded 8Mb STT-MRAM macro with 9ns read access time in 16nm FinFET logic CMOS process,” in Proc. IEDM Conf., 2020, pp. 11.4.1–11.4.4.
5. V. B. Naik, K. Yamane, T. Lee, J. Kwon, R. Chao et al., “JEDEC-qualified highly reliable 22nm FD-SOI embedded MRAM for low-power industrial-grade, and extended performance towards automotive-grade-1 applications,” in Proc. IEDM Conf., 2020, pp. 11.3.1–11.3.4.
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