Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/9052588/9068948/09068958.pdf?arnumber=9068958
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04
2. An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27
3. A New Fast Logarithm Algorithm Using Advanced Exponent Bit Extraction for Software-Based Ultrasound Imaging Systems;Electronics;2022-12-30
4. An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24
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