An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units-Reference-Cited by-同舟云学术

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An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units

Published:2023-02-27 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS)
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Author:

Da Rosa Morgana M. A.¹^ORCID,Da Costa Patrícia²,Paim Guilherme²,Da Costa Eduardo³,Soares Rafael¹,Bampi Sergio²

Affiliation:

1. Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil

2. Federal University of Rio Grande do Sul,Graduate Program on Microelectronics,Porto Alegre,Brazil

3. Catholic University of Pelotas,Graduate Program on Electronic Engineering and Computing,Pelotas,Brazil

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10108078/10108098/10108306.pdf?arnumber=10108306

Reference14 articles.

1. High Performance 3-2 Compressors Architectures for High speed Multipliers

2. The Radix-2m Squared Multiplier

3. Division algorithms and implementations

4. Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design

5. MACISH: Designing Approximate MAC Accelerators With Internal-Self-Healing

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration;IEEE Transactions on Circuits and Systems I: Regular Papers;2023

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